Interposers are nothing new, but a lot of research and development by NVIDIA, AMD, Intel or other companies in the industry has gone in this direction in recent years, because in the same way as the development of Chip-based architectures are important, the same goes for your intercom.
What is an interposer?
Technically, an interposer is a type of PCB, so it’s a board with multiple chips mounted on it. Interposers are traditionally called this due to the fact that they are a plate located between what is the main PCB and the chips on top of it. For example, an MXM module in which the dedicated GPUs for laptops are mounted can be considered as interposers.
This is also the case for certain “on-board” external memory chips, such as the L4 for Intel Iris released a few years ago, where the on-board memory and the SoC were mounted on the same interposer.
But, in recent years, the use of interposers has been linked to so-called 2.5D IC integrated circuits, which are based on the implementation of 3D DRAM memory, usually HBM and therefore use interconnects vertical. These interposers are designed to provide as fast communication as possible with the lowest possible power consumption, and if there is anything that gives HBM memory an edge over other memories like GDDR6, it is its pJ / bit ratio.
Simply if you do the calculation of the multiplication of the pJ / bit by the bandwidth per second, in bits, you will be able to see the consumption and how the HBM2 is a memory with higher consumption performance. However, much of the magic is due to the interposer communicating the different parts, which is essential in building a 2.5DIC system.
Data transfer is expensive
If you ask an expert in the field who has designed new architectures, you will see how the answer will always be the same. The problem is no longer to get as many calculations as possible, but to get as many data movements as possible within a fixed energy budget.
All chips have a series of data pins that are used to send and receive information between them, each sending of information has an energy cost, which to increase the bandwidth requires two standard solutions:
- Increase the number of pins, which leads to the increase in the size of the chip, that is, less chips per wafer and the reduction of the available stock. Besides creating additional latency issues due to the larger size.
- The increase in the clock speed of the external interfaces is not an increase in the price, but rather in the consumption, because the consumption increases quadratically with the clock speed and the latter increases linearly with the voltage.
The solution that was found was to place the pins vertically, so that there could be a lot more without increasing the surface area of the chip. The idea is the same as what we can see in CPU sockets where we have hundreds of pins that communicate with the board. The idea with the interposers in 2.5DIC configurations that they communicate vertically with all the chips and then the interposer itself is in charge of moving that data.
We are therefore talking about a large number of interconnections which must be carried out by the interposer, which means that it must have enormous internal complexity and that these are totally necessary in these configurations.
Types of interposer
There are different types of interposer, which we will talk about next, without mentioning specific brands or proprietary technologies, but rather giving a general explanation of the different types of interposer that exist. However, it should be noted that all are designed for the implementation of 2.5DIC systems.
These are the most used and currently the only ones that exist in the big industry, because all the images that accompany this post are of this type of interposer.
They are so called because they are yet another flea, but on a large scale. The problem? They are expensive to make and can cost anywhere from $ 30 to $ 100. In addition, they have the problem of not being able to offer clock speeds for communication beyond 4 GHz. As HBM memory currently requires less clock speed, it has not reached its limit.
These are the ones that are usually used in their construction of organic items such as epoxy resin. They do not have the same performance as a conventional silicon interposer, as it allows much lower clock speeds, but their production cost is very low and is between $ 2 and $ 3.
The reason why they cannot achieve the clock speeds of silicon interposers is mainly due to the fact that they cannot tolerate high temperatures, which determines the design of the interfaces created in them, as well as their use. .
Organic interposers do not use silicon pathways for intercommunication, but there are so-called 2.1D interposers which are a combination of silicon and organic interposer, where the high transfer rate of silicon at a lower rate is desired. .
Glass optical interposers
There are also glass interposers, these are not based on communication using electrons, but they are communicating by photons. They are therefore the most efficient, but their manufacture is complex. Most likely, they will eventually replace the silicon interposers if necessary.
Being able to communicate by optical intercom eliminates the need to run tracks through silicon through the interposer. So it’s a different paradigm, which we’ll take years to see.
We also have to take into account that they will need a new type of fabrication, as we are not talking about the same methodology to fabricate them as silicon and organic interposers. This can limit its availability to high performance equipment such as servers and supercomputers for years.
Silicon bridges or interposers without TSV
Bridges are silicon interposers, but with a special feature, they do not use pathways through silicon. This solution will become famous in a few years, because it is the form of intercommunication chosen by Intel with its EMIB and a variant of it is specified in the patents of future systems based on AMD chips, so they become the alternative. ideal for silicon. interposers for the internal market.
The idea of bridges is to connect the chips directly instead of having an internal interconnect. This is an ideal solution when there are few chips on top of the interposer and at a much lower cost.