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What are Intel’s 10nm SuperFin transistors?



What are Intel’s 10nm SuperFin transistors?

Even months after the launch, Intel's 10nm processors have a very low production volume, with Tiger Lake expected to be the first real example of what should have been Intel's 10nm vision. .

Intel production processes

Before we go into business with SuperFin, let's take a look at the history that led to its birth. The next step for a foundry change in Intel production, is moving to 7nm with EUV technology (Extreme Ultra Violet), also gone (announced by Intel itself). With issues like these, Intel strives to maintain confidence that they can introduce the industry’s best technology that is competitive in the market. This used to be the position Intel held until problems with lags started with its 10nm node.

Intel's exposure to its production technology varies widely depending on how successful the product is internally. When they announced the process first FinFET At its 22nm node in May 2011, there was already a lot of detail from the beginning and this node was very successful. For the next generation, 14 nm, there was some delay in the first generation of processors (Broadwell) but the company finally explained the process in detail at its event, about August 2014.

Node method process at 14 nm has been a huge advantage to Intel so far, and the steady development of intranode over the years shows this (14+, 14 ++, 14 +++, 14 ++++), giving the company Active development equivalent to pure node development within one generation of processors.

Speaking of 10 nm, the situation is less optimistic, or we can compare it to the delay in 14 nm. To date, Intel has two generations of 10nm CPU products, one of which the company avoids even mentioning in public. Cannon Lake, the first 10nm product, entered the Crimson Canyon NUC PC product, and it was a disaster: only two cores, no integrated drawings and although they included it in the 2017 financial report, the company stopped immediately.

The Ice Lake was an ideal Intel shuttle at 10nm, offering four cores and excellent integrated graphics for the Gen 11 at just 15W TDP. It has found a way to the designs of more than 50 brochures, but while it has provided a full-time increase of up to 20% clock-by-clock, a 10-20% decrease in clock speed has made the final improvement. you are not important. Ice Lake graphics are still much better than 14nm, and support for Thunderbolt 3 and 512-bit vector commands made us a good point though.

Right now, because Intel doesn't want to see Cannon Lake as a real part of its heritage, Ice Lake was considered a “10nm” flat product with no added benefits. Later, Ice Lake became Tiger Lake, built on an original site called 10+.

Intel SuperFin Technology

SuperFin technology at 10nm is what Tiger Lake architecture is based on, and represents a new 10+ name for its lithography.

As part of Intel's 10FS process, we will look at what makes this different from the 10nm Ice Lake, as well as the refurbishment of other key parts of the transistor design that makes this process, and what they do. Intel claims to redefine the way transistors work.

10SD builds to 10nm by introducing FinFET restructuring (4th generation?). With each Fin release coming out with a new SuperMIM (Metal-Insulator-Metal, Metal-Insulator-Metal) formulation, the SuperFin design focuses on three areas:

With new design techniques, epitaxial growth of crystal structures in the spring and drain has been improved, increasing the distortion to reduce resistance and allow more current to flow through the channels.

The advanced design of the source / output and the produced process of transistor gate development helps to move more channel flow, allowing payment carriers to move faster and improve the performance of individual transistors.

In addition, a larger gateway tone to allow for a higher drive for the performance of certain chip functions also helps to improve performance. Often the larger step of the gate may sound like a transistor, but making the transistor bigger with improved performance actually means that fewer buffers are needed in efficient libraries and, ultimately the cell size decreases as a result.

When it comes to stainless steel, Intel makes some claims that we can call “brave” and include exciting technology.

In the lower parts of the stack, Intel introduced a new set of blocking devices that make them thinner, which also helps in reducing track resistance by up to 30%, allowing each metal to have a larger flow rate. Reduction of resistance improves the performance of the connection between the metal layers.

Another development in this SuperFin process is that at higher levels, Intel introduces the new SuperMIM capacitor we talked about it before. According to the manufacturer, this new design offers a 5X increase in power over the normal industrial limit while staying in the same location.

This generating power outages eventually leads to significantly improved product performance and transistor performance. Intel says this is an industry-leading industry, empowered by careful installation of new Hi-K items with thin layers, less than 0.1 nm, to form a “super grid” between two or more types of building materials.

Taken together, Intel claims that all of these SuperFin devices represent “significant improvements in Intel's history,” and enable 17-18% better transistor performance from 10nm designs. This makes the 10SF process equal to the full node development over Intel's base 10nm process. Drawing to resemble a 14nm sign, 10SF is equal to Cofi Lake (14 +++) and Broadwell (14nm).

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