We are still waiting for the 5nm node to be standardized on PC, which is what we expect by 2022. TSMC cannot sit idly by and must have its 3nm node ready. Which will start mass-producing chips from the second half of 2022. We already know that the first customers will be both Apple and surprisingly also Intel. Because each node will start to create smaller and lower power chips before making the jump to more complex ones like CPUs and GPUs for PCs, for which we will have to wait until 2023 or even 2024.
TSMC’s idea for 3nm, reduce the number of EUV layers
The costs of deploying each manufacturing node are higher and higher, the space race that is the semiconductor world has meant that more and more manufacturers have been erased from continuing to work on it. Currently, we can count the number of foundries that the most advanced nodes can handle with the fingers of one hand and we would have a few left.
The high costs forced TSMC to spend $ 100 billion to deploy the new nodes over the next three years. An immense capital which the various investors fear that it will have a return much lower than that of the preceding generations. Biggest expense on new nodes? EUV machines whose high cost will make them the most expensive node to date, which is why TSMC has decided to implement a continuous improvement plan, which allows it to cut EUV equipment from its 3nm node.
How do you plan to achieve this? Well, it looks like by reducing the number of EUV layers that would be used at the 3nm node. That increase with each new TSMC manufacturing node. These started to be 4 at node N7 + of TSMC, to increase to 5 at node N6. For chips at 5nm, between 14 and 15 EUV layers will be needed and the thing goes to 25 layers at 3nm. TSMC’s plan? Reduce them to 20 to reduce costs.
A war to choose the best customers
The entry of Intel in competition for TSMC with the support of the American government, which wants to convince that the manufacturing is not only carried out on American soil. but by one of the big companies in this country. This situation is the reason why TSMC had to opt for certain solutions to reduce its costs.
To date, the TSMC N3 or 3nm node is one of the most advanced in the absence of Intel presenting its own. So what’s the problem? Well, the fact that an increase in the deployment costs of each node increases the cost of the wafers and reaches the point where the use of a more advanced node is not economically viable.
Not all hardware components require extremely advanced nodes to function, this reduces the utility of more advanced nodes and makes the hardware that uses them more expensive. Therefore, companies like TSMC are looking for ways to reduce the costs of their future nodes. Especially since it now seems that it will have much fiercer competition, after years when everything indicated an absolute monopoly due to the immobility of its competitors.